HYB511000BJ数据手册Infineon中文资料规格书

描述 Description

1 M×1-Bit Dynamic RAM Low Power 1 M×1-Bit Dynamic RAMThe HYB 511000BJ/BJL is the new generation dynamic RAM organized as 1 048 576 words by 1-bit. The HYB 511000BJ/BJL utilizes CMOS silicon gate process technology as well as advanced circuit techniques to provide wide operating margins, both internally and for the system user. Multiplexed address inputs permit the HYB 511000BJ/BJL to be packaged in a standard plastic P-SOJ-26/20.Advanced Information
• 1 048 576 words by 1-bit organization
• Fast access and cycle time
50 ns access time
95 ns cycle time (-50 version)
60 ns access time
130 ns cycle time (-60 version)
70 ns access time
130 ns cycle time (-70 version)
• Fast page mode cycle time
35 ns (-50 version)
40 ns (-60 version)
45 ns (-70 version)
• Low power dissipation
max. 495 mW active (-50 version)
max. 440 mW active (-60 version)
max. 385 mW active (-70 version)
max. 5.5 mW standby
max. 1.1 mW standby for L-version
• Single + 5 V (±10 %) supply with a built-in VBB generator
• Output unlatched at cycle end allows two dimensional chip selection
• Common I/O capability using “early write” operation
• Read-modify-write,CAS-before-RAS refresh, RAS-only refresh, hidden-refresh, fast page mode capability and test mode capability
• All inputs, outputs and clocks TTL-compatible
• 512 refresh cycles/8 ms 512 refresh cycles/64 ms for L-version only
• Plastic Packages: P-SOJ-26/20-1