Digital QPSK Demodulator

Description The HSP50306 is a 6-bit QPSK demodulator chip designed for use in high signal to noise environments which have some multipath distortion. The part recovers 2.048 MBPS data from samples of a QPSK modulated 10.7MHz or 2.1MHz carrier. The chip coherently demodulates the waveform, recover

文件：37.78 Kbytes 页数：8 Pages

INTERSIL

Digital QPSK Demodulator

Features • 25.6MHz or 26.97MHz Clock Rates • Single Chip QPSK Demodulator with 10kHz Tracking Loop • Square Root of Raised Cosine ( = 0.4) Matched Filtering • 2.048 MBPS Reconstructed Output Data Stream • Bit Synchronization with 3kHz Loop Bandwidth • Internal Equalization for Multipath D

文件：434.71 Kbytes 页数：8 Pages

RENESAS

瑞萨

Digital QPSK Demodulator

文件：161.68 Kbytes 页数：8 Pages

INTERSIL

Digital QPSK Demodulator

Renesas

瑞萨

Digital QPSK Demodulator

Description The HSP50306 is a 6-bit QPSK demodulator chip designed for use in high signal to noise environments which have some multipath distortion. The part recovers 2.048 MBPS data from samples of a QPSK modulated 10.7MHz or 2.1MHz carrier. The chip coherently demodulates the waveform, recover

文件：37.78 Kbytes 页数：8 Pages

INTERSIL

Digital QPSK Demodulator

Description The HSP50306 is a 6-bit QPSK demodulator chip designed for use in high signal to noise environments which have some multipath distortion. The part recovers 2.048 MBPS data from samples of a QPSK modulated 10.7MHz or 2.1MHz carrier. The chip coherently demodulates the waveform, recover

文件：37.78 Kbytes 页数：8 Pages

INTERSIL

Digital QPSK Demodulator

Description The HSP50306 is a 6-bit QPSK demodulator chip designed for use in high signal to noise environments which have some multipath distortion. The part recovers 2.048 MBPS data from samples of a QPSK modulated 10.7MHz or 2.1MHz carrier. The chip coherently demodulates the waveform, recover

文件：37.78 Kbytes 页数：8 Pages

INTERSIL

Digital QPSK Demodulator

Features • 25.6MHz or 26.97MHz Clock Rates • Single Chip QPSK Demodulator with 10kHz Tracking Loop • Square Root of Raised Cosine ( = 0.4) Matched Filtering • 2.048 MBPS Reconstructed Output Data Stream • Bit Synchronization with 3kHz Loop Bandwidth • Internal Equalization for Multipath D

文件：434.71 Kbytes 页数：8 Pages

RENESAS

瑞萨

Digital QPSK Demodulator

Description The HSP50306 is a 6-bit QPSK demodulator chip designed for use in high signal to noise environments which have some multipath distortion. The part recovers 2.048 MBPS data from samples of a QPSK modulated 10.7MHz or 2.1MHz carrier. The chip coherently demodulates the waveform, recover

文件：37.78 Kbytes 页数：8 Pages

INTERSIL

Digital QPSK Demodulator

文件：161.68 Kbytes 页数：8 Pages

INTERSIL