HSP50214B中文资料可编程下转换器数据手册Renesas规格书

描述 Description

The HSP50214B Programmable Downconverter converts digitized IF data into filtered baseband data which can be processed by a standard DSP microprocessor. The Programmable Downconverter (PDC) performs down conversion, decimation, narrowband low pass filtering, gain scaling, resampling, and Cartesian to Polar coordinate conversion.
The 14-bit sampled IF input is down converted to baseband by digital mixers and a quadrature NCO, as shown in the Block Diagram. A decimating (4 to 32) fifth order Cascaded Integrator-Comb (CIC) filter can be applied to the data before it is processed by up to 5 decimate-by-2 halfband filters. The halfband filters are followed by a 255-tap programmable FIR filter. The output data from the programmable FIR filter is scaled by a digital AGC before being re-sampled in a polyphase FIR filter. The output section can provide seven types of data: Cartesian (I, Q), polar (R, θ), filtered frequency (dθ/dt), Timing Error (TE), and AGC level in either parallel or serial format.

特性 Features

• Up to 65MSPS Front-End Processing Rates (CLKIN) and 55MHz Back-End Processing Rates (PROCCLK) Clocks May Be Asynchronous
• Up to 255-Tap Programmable FIR
• Output Samples Rates to ≈ 12.94MSPS with Output Bandwidths to ≈ 982kHz Lowpass
• Digital Resampling Filter for Symbol Tracking Loops and Incommensurate Sample-to-Output Clock Ratios
• Serial, Parallel, and FIFO 16-Bit Output Modes
• Input Level Detector for External I.F. AGC Support
• Pb-Free Plus Anneal Available (RoHS Compliant)

应用 Application

• Single Channel Digital Software Radio Receivers
• Compatible with HSP50210 Digital Costas Loop for PSK Reception
• Evaluation Platform Available