HSP50214RF/IF射频/中频RFID的RFIC模块规格书PDF中文资料

描述 Description

The HSP50214 Programmable Downconverter converts digitized IF data into filtered baseband data which can be processed by a standard DSP microprocessor. The Programmable Downconverter (PDC) performs down conversion, decimation, narrowband low pass filtering, gain scaling, re-sampling, and Cartesian to Polar coordinate conversion.

特性 Features

• Up to 52 MSPS Front-End Processing Rates (CLKIN) and 35 MSPS Back-End Processing Rates (PROCCLK) Clocks May Be Asynchronous

• Processing Capable of >100dB SFDR8-

• Up to 255-Tap Programmable FIR

• Overall Decimation Factor Ranging from 4 to 16384

• Output Samples Rates to ≅8.2 MSP8-S with Output Bandwidths to ≅625kHz Lowpass

• 32-Bit Programmable NCO for Channel Selection and Carrier Tracking

• Digital Re-Sampling Filter for Symbol Tracking Loops and Incommensurate Sample-to-Output Clock Ratios

• Digital AGC with Programmable Limits and Sle8- Rate to Optimize Output Signal Resolution; Fixed or Auto Gain Adjust

• Serial, Parallel, and FIFO 16-Bit Output Modes

• Cartesian to Polar Converter and Frequency Discriminator for AFC Loops and Demodulation of AM, FM, FSK, and DPSK

• Input Level Detector for External I.F. AGC Support

Applications

• Single Channel Digital Software Radio Receivers

• Base Station Rx’s: AMPS, NA TDMA, GSM, and CDMA

• Compatible with HSP50210 Digital Costas Loop for PSK Reception

• Evaluation Platform Available