射频前端芯片

\n HS8308Power Amplifier Module (PAM) is a fully matched 10-pad surface mount module developed for Wideband Code Division Multiple Access (WCDMA) applications. This small and efficient module covers 880-915 MHz bandwidth operation with a single compact package. Due to high efficiency attained thr \nExcellent Linearity\nHigh Efficiency\n•46%at 28dBm\n•10-pad Configuration\nAPT Operation Supported\nLarge Dynamic Range\nSmall, Low Profile Package\n•3mm*3mm*0.9mm\n ;

OnMicro

昂瑞微

射频功放前端芯片

\n  \n HS8308E Power Amplifier Module (PAM) is a fully matched 10-pad surface mount module developed for Wideband Code Division Multiple Access (WCDMA) applications. This small and efficient module covers 880-915 MHz bandwidth operation with a single compact package. Due to high efficiency att \nExcellent Linearity\nHigh Efficiency\n•43%at 28dBm\n•10-pad Configuration\nAPT Operation Supported\nLarge Dynamic Range\nSmall, Low Profile Package\n•3mm*3mm*0.9mm\n ;

OnMicro

昂瑞微

Low Skew, 1-To-8 Differential/LVCOMS-TO-LVCMOS Fanout Buffer

GENERAL DESCRIPTION The ICS8308I is a low-skew, 1-to-8 Fanout Buffer and a member of the HiPerClockS™ family of High Performance Clock Solutions from ICS. The ICS8308I has two selectable clock inputs. The CLK, nCLK pair can accept most differential input levels. The LVCMOS_CLK can accept LVCMOS o

文件：226.93 Kbytes 页数：15 Pages

ICST

LOW SKEW, 1-TO-8 DIFFERENTIAL/LVCMOS-TO-LVCMOS FANOUT BUFFER

GENERAL DESCRIPTION The ICS8308I is a low-skew, 1-to-8 Fanout Buffer and a member of the HiPerClockS™family of High Performance Clock Solutions from IDT. The ICS8308I has two selectable clock inputs. The CLK, nCLK pair can accept most differential input levels. The LVCMOS_CLK can accept LVCMOS or

文件：300.43 Kbytes 页数：16 Pages

IDT

Low Skew, 1-To-8 Differential/LVCOMS-TO-LVCMOS Fanout Buffer

GENERAL DESCRIPTION The ICS8308I is a low-skew, 1-to-8 Fanout Buffer and a member of the HiPerClockS™ family of High Performance Clock Solutions from ICS. The ICS8308I has two selectable clock inputs. The CLK, nCLK pair can accept most differential input levels. The LVCMOS_CLK can accept LVCMOS o

文件：226.93 Kbytes 页数：15 Pages

ICST