HN58V256AFP-12中文资料日立数据手册PDF规格书

描述 Description

The Hitachi HN58V256A and HN58V257A are electrically erasable and programmable ROMs organized as 32768-word × 8-bit. They have realized high speed, low power consumption and high reliability by employing advanced MNOS memory technology and CMOS process and circuitry technology. They also have a 64-byte page programming function to make their write operations faster.

特性 Features

• Single 3 V supply: 2.7 to 5.5 V

• Access time: 120 ns max

• Power dissipation:

- Active: 20 mW/MHz, (typ)

- Standby: 110 µW (max)

• On-chip latches: address, data, CE, OE, WE

• Automatic byte write: 10 ms max

• Automatic page write (64 bytes): 10 ms max

• Ready/Busy (only the HN58V257A series)

• Data polling and Toggle bit

• Data protection circuit on power on/off

• Conforms to JEDEC byte-wide standard

• Reliable CMOS with MNOS cell technology

• 105 erase/write cycles (in page mode)

• 10 years data retention

• Software data protection

• Write protection by RES pin (only the HN58V257A series)

• Industrial versions (Temperature range: – 20 to 85˚C and – 40 to 85˚C) are also available.