General Description

The HMC836LP6CE is a fully functioned Fractional-N Phase-Locked-Loop (PLL) with an Integrated Voltage Controlled Oscillator (VCO). The PLL consists of an integrated low noise VCO with x2 output, an autocalibration subsystem for low voltage VCO tuning, a very low noise digital Phase Detector (PD), a precision controlled charge pump, a low noise reference path divider and a fractional divider.

Features

• RF Bandwidth: 3365 to 3705 MHz

• Ultra Low Phase Noise -98 dBc/Hz in Band Typ

• Figure of Merit (FOM) -227 dBc

• < 180 fs rms Jitter (Integrated 100 Hz to 100 MHz SSB)

• 24-bit Frequency Step Size, Resolution 3 Hz typ

• Exact Frequency Mode

• Built-in Digital Self Test

• 40 Lead 6x6 mm SMT Package: 36 mm2

Typical Applications

• Cellular/4G Infrastructure

• Repeaters and Femtocells

• Communications Test Equipment

• CATV Equipment

• Phased Array Applications

• DDS Replacement

• Very High Data Rate Radios

HMC836LP6CE属于集成电路（IC） > 时钟发生器，PLL，频率合成器。亚德诺半导体技术有限公司制造生产的HMC836LP6CE时钟发生器，PLL，频率合成器时钟发生器、PLL 和频率合成器集成电路 (IC) 可为逻辑器件提供参考信号的稳定定时脉冲，这些器件包括计算机、微控制器、数据通信系统和图形/视频发生器。这些集成电路可能包括缓冲器、驱动器、分频器、倍频器、多路复用器、合成器、扇出分配器和预分频器。