HMC832集成电路（IC）的时钟发生器PLL频率合成器规格书PDF中文资料

HMC832属于集成电路（IC）的时钟发生器PLL频率合成器。由亚德诺半导体技术有限公司制造生产的HMC832时钟发生器，PLL，频率合成器时钟发生器、PLL 和频率合成器集成电路 (IC) 可为逻辑器件提供参考信号的稳定定时脉冲，这些器件包括计算机、微控制器、数据通信系统和图形/视频发生器。这些集成电路可能包括缓冲器、驱动器、分频器、倍频器、多路复用器、合成器、扇出分配器和预分频器。

GENERAL DESCRIPTION

The HMC832 is a 3.3 V, high performance, wideband, fractional-N, phase-locked loop (PLL) that features an integrated voltage controlled oscillator (VCO) with a fundamental frequency of 1500 MHz to 3000 MHz, and an integrated VCO output divider (divide by 1/2/4/6/…60/62), that enables the HMC832 to generate continuous frequencies from 25 MHz to 3000 MHz. The integrated phase detector (PD) and delta-sigma (Δ-Σ) modulator, capable of operating at up to 100 MHz, permit wider loop bandwidths and faster frequency tuning with excellent spectral performance.

Industry leading phase noise and spurious performance, across all frequencies, enable the HMC832 to minimize blocker effects, and to improve receiver sensitivity and transmitter spectral purity. A low noise floor (−160 dBc/Hz) eliminates any contribution to modulator/mixer noise floor in transmitter applications.

FEATURES

RF bandwidth:

25 MHz to 3000 MHz

3.3 V supply

Maximum phase detector rate: 100 MHz

Ultralow phase noise

−110 dBc/Hz in band, typical

Fractional figure of merit (FOM): −226 dBc/Hz

24-bit step size, resolution 3 Hz typical

Exact frequency mode with 0 Hz frequency error

Fast frequency hopping

40-lead 6 mm × 6 mm SMT package: 36 mm2

APPLICATIONS

Cellular infrastructure

Microwave radio

WiMax, WiFi

Communications test equipment

CATV equipment

DDS replacement

Military

Tunable reference source for spurious-free performance