HM628512C中文资料4 M SRAM (512-kword ×8-bit)数据手册Renesas规格书

描述 Description

The Hitachi HM628512C is a 4-Mbit static RAM organized 512-kword ×8-bit. It realizes higher density, higher performance and low power consumption by employing CMOS process technology (6-transistor memory cell). The device, packaged in a 525-mil SOP (foot print pitch width) or 400-mil TSOP TYPE II or 600-mil plastic DIP, is available for high density mounting. The HM628512C is suitable for battery backup system.

特性 Features

•  Single 5 V supply
•  Access time: 55/70 ns (max)
•  Power dissipation
 Active: 10 mW/MHz (typ)
 Standby: 4 µW (typ)
•  Completely static memory. No clock or timing strobe required
•  Equal access and cycle times
•  Common data input and output: Three state output
•  Directly TTL compatible: All inputs and outputs
•  Battery backup operation