HM628512BLRR-5中文资料日立数据手册PDF规格书

描述 Description

The Hitachi HM628512B is a 4-Mbit static RAM organized 512-kword ×8-bit. It realizes higher density, higher performance and low power consumption by employing 0.35 µm Hi-CMOS process technology. The device, packaged in a 525-mil SOP (foot print pitch width) or 400-mil TSOP TYPE II or 600-mil plastic DIP, is available for high density mounting. The HM628512B is suitable for battery backup system.

特性 Features

• Single 5 V supply

• Access time: 55/70 ns (max)

• Power dissipation

 Active: 50 mW/MHz (typ)

 Standby: 10 µW (typ)

• Completely static memory. No clock or timing strobe required

• Equal access and cycle times

• Common data input and output: Three state output

• Directly TTL compatible: All inputs and outputs

• Battery backup operation