HM6264B中文资料64 k SRAM (8-kword × 8-bit)数据手册HITACHI规格书

描述 Description

The Hitachi HM6264B is 64k-bit static RAM organized 8-kword × 8-bit. It realizes higher performance and low power consumption by 1.5 µm CMOS process technology. The device, packaged in 450 mil SOP (foot print pitch width), 600 mil plastic DIP, 300 mil plastic DIP, is available for high density mounting.

特性 Features

• High speed
  Fast access time: 85/100 ns (max)
• Low power
  Standby: 10 µW (typ)
  Operation: 15 mW (typ) (f = 1 MHz)
• Single 5 V supply
• Completely static memory
  No clock or timing strobe required
• Equal access and cycle times
• Common data input and output
  Three state output
• Directly TTL compatible
  All inputs and outputs
• Battery backup operation capability