HM-6551中文资料Intersil数据手册PDF规格书

描述 Description

The HM-6551 is a 256 x 4 static CMOS RAM fabricated using self-aligned silicon gate technology. Synchronous circuit design techniques are employed to achieve high performance and low power operation.

特性 Features

• Low Power Standby . . . . . . . . . . . . . . . . . . . . 50µW Max

• Low Power Operation . . . . . . . . . . . . . 20mW/MHz Max

• Fast Access Time. . . . . . . . . . . . . . . . . . . . . . 220ns Max

• Data Retention . . . . . . . . . . . . . . . . . . . . . . . .at 2.0V Min

• TTL Compatible Input/Output

• High Output Drive - 1 TTL Load

• Internal Latched Chip Select

• High Noise Immunity

• On-Chip Address Register

• Latched Outputs

• Three-State Output