HEF4724BF数据手册行情报价飞利浦PHILIPS-114ic电子网

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型号	下载订购	功能描述	制造商上传企业	LOGO
HEF4724BF	文件：71.4 Kbytes Page：7 Pages	8-bit addressable latch DESCRIPTION The HEF4724B is an 8-bit addressable latch with three address inputs (A0 to A2), a data input (D), an active LOW enable input (E), an active HIGH clear input (CL), and eight parallel latch outputs (O0 to O7). 文件：71.4 Kbytes 页数：7 Pages	PHI PHI	PHI
HEF4724BN	文件：71.4 Kbytes Page：7 Pages	8-bit addressable latch DESCRIPTION The HEF4724B is an 8-bit addressable latch with three address inputs (A0 to A2), a data input (D), an active LOW enable input (E), an active HIGH clear input (CL), and eight parallel latch outputs (O0 to O7). 文件：71.4 Kbytes 页数：7 Pages	PHI PHI	PHI
HEF4724BP	文件：71.4 Kbytes Page：7 Pages	8-bit addressable latch DESCRIPTION The HEF4724B is an 8-bit addressable latch with three address inputs (A0 to A2), a data input (D), an active LOW enable input (E), an active HIGH clear input (CL), and eight parallel latch outputs (O0 to O7). 文件：71.4 Kbytes 页数：7 Pages	PHI PHI	PHI
HEF4724BT	文件：71.4 Kbytes Page：7 Pages	8-bit addressable latch DESCRIPTION The HEF4724B is an 8-bit addressable latch with three address inputs (A0 to A2), a data input (D), an active LOW enable input (E), an active HIGH clear input (CL), and eight parallel latch outputs (O0 to O7). 文件：71.4 Kbytes 页数：7 Pages	PHI PHI	PHI

更多HEF4724BF供应商更新时间2026-1-18 16:30:00