HEF4027BF中文资料飞利浦数据手册PDF规格书

DESCRIPTION

The HEF4027B is a dual JK flip-flop which is edge-triggered and features independent set direct

(SD), clear direct (CD), clock (CP) inputs and outputs (O,O). Data is accepted when CP is LOW, and transferred to the output on the positive-going edge of the clock. The active HIGH asynchronous clear-direct (CD) and set-direct (SD) are independent and override the J, K, and CP inputs. The outputs are buffered for best system performance. Schmitt-trigger action in the clock input makes the circuit highly tolerant to slower clock rise and fall times.