Quad Port Bypass Circuit with CDR for Fibre Channel Arbitrated Loops

Description The HDMP-0452 is a Quad Port Bypass Circuit (PBC) with a Clock and Data Recovery (CDR) circuit included. This device minimizes part count, cost and jitter accumulation while repeating incoming signals. Port Bypass Circuits are used in hard disk arrays constructed in Fibre Channel Arbi

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HP

安捷伦

Quad Port Bypass Circuit with CDR for Fibre Channel Arbitrated Loops

Agilent

安捷伦

DESCRIPTION

DESCRIPTION The ICPL0452, ICPL0453, ICPL0500 and ICPL0501 devices each consist of an infrared emitting diode, optically coupled to a high speed photo detector transistor. A separate connection for the photodiode bias and output-transistor collector increase the speed by several orders of magnitud

文件：547.49 Kbytes 页数：10 Pages

ISOCOM

英国安数光

40V, 45A, 3.5m max. Silicon N Channel Power MOS FET Power Switching

文件：108.06 Kbytes 页数：7 Pages

RENESAS

瑞萨

Silicon N Channel Power MOS FET Power Switching

文件：87.31 Kbytes 页数：7 Pages

RENESAS

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