HD74LV161A中文资料瑞萨数据手册PDF规格书

描述 Description

The HD74LV161A is 4-bit binary counters. All flip flops are clocked simultaneously on the low to high to transition (positive edge) of the clock input waveform. These counters may be preset using the load input. Presetting of all four flip flops is synchronous to the rising edge of clock. When load is held low counting is disabled and the data on the A, B, C and D inputs is loaded into the counter on the rising edge clock. If the load input is taken high before the positive edge of clock, the count operation will be unaffected.

特性 Features

• VCC = 2.0 V to 5.5 V operation

• All inputs VIH (Max.) = 5.5 V (@VCC = 0 V to 5.5 V)

• All outputs VO (Max.) = 5.5 V (@VCC = 0 V)

• Typical VOL ground bounce < 0.8 V (@VCC = 3.3 V, Ta = 25°C)

• Typical VOH undershoot > 2.3 V (@VCC = 3.3 V, Ta = 25°C)

• Output current ±6 mA (@VCC = 3.0 V to 3.6 V), ±12 mA (@VCC = 4.5 V to 5.5 V)