Quad. Bus Buffer Gates with 3-state Outputs

Description The HD74LV125A features independent line drivers with three state outputs. Each output is disabled when the associated output enable (OE) input is high. To ensure the high impedance state during power up or power down, OE should be connected to VCC through a pull-down resistor; the mi

文件：80.57 Kbytes 页数：10 Pages

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Quad. Bus Buffer Gates with 3-state Outputs

文件：105.76 Kbytes 页数：12 Pages

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General-Purpose Logics

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Quad. Bus Buffer Gates with 3-state Outputs

Description The HD74LV125A features independent line drivers with three state outputs. Each output is disabled when the associated output enable (OE) input is high. To ensure the high impedance state during power up or power down, OE should be connected to VCC through a pull-down resistor; the mi

文件：80.57 Kbytes 页数：10 Pages

RENESAS

瑞萨

Quad. Bus Buffer Gates with 3-state Outputs

文件：105.76 Kbytes 页数：12 Pages

RENESAS

瑞萨

Quad. Bus Buffer Gates with 3-state Outputs

Description The HD74LV125A features independent line drivers with three state outputs. Each output is disabled when the associated output enable (OE) input is high. To ensure the high impedance state during power up or power down, OE should be connected to VCC through a pull-down resistor; the mi

文件：80.57 Kbytes 页数：10 Pages

RENESAS

瑞萨