HD74LS245FPEL数据手册Renesas中文资料规格书

描述 Description

This octal bus transceiver is designed for synchronous two-way communication between data buses. The control function implementation minimizes external timing requirements. The device allows data transmission from the A bus to the B bus or from the B bus to the A bus depending upon the logic level at the direction control (DIR) input. The enable input (G) can be used to disable the device so that the buses are effectively isolated.