HD74HCT125FPEL中文资料瑞萨数据手册PDF规格书

描述 Description

The HD74HCT125, HD74HCT126 require the 3-state control input C to be taken high to put the output into the high impedance condition, whereas the HD74HCT125, HD74HCT126 requires the control input to be low to put the output into high impedance.

特性 Features

• LSTTL Output Logic Level Compatibility as well as CMOS Output Compatibility

• High Speed Operation: tpd (A to Y) = 12 ns typ (CL = 50 pF)

• High Output Current: Fanout of 15 LSTTL Loads

• Wide Operating Voltage: VCC = 4.5 to 5.5 V

• Low Input Current: 1 µA max

• Low Quiescent Supply Current: ICC (static) = 4 µA max (Ta = 25°C)