Quad. Bistable Latches

Description This latch is ideally suited for use as temporary storage for binary information processing, input/output, and indicator units. Information present at the data (D) input is transferred to the Q output when the latch enable (LE) is high. The Q output will follow the data input as long

文件：103.31 Kbytes 页数：8 Pages

RENESAS

瑞萨

Quad. Bistable Latches

Description This latch is ideally suited for use as temporary storage for binary information processing, input/output, and indicator units. Information present at the data (D) input is transferred to the Q output when the latch enable (LE) is high. The Q output will follow the data input as long

文件：103.31 Kbytes 页数：8 Pages

RENESAS

瑞萨

Dual 2-Bit Transparent Latch High-Performance Silicon-Gate CMOS

The IN74HC75A is identical in pinout to the LS/ALS75. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LS/ALSTTL outputs. This device consists of two independent 2-bit transparent latches and can be used as temporary storage for binary i

文件：214.35 Kbytes 页数：6 Pages

INTEGRAL

Integral Corp.

Dual 2-Bit Transparent Latch High-Performance Silicon-Gate CMOS

The IN74HC75A is identical in pinout to the LS/ALS75. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LS/ALSTTL outputs. This device consists of two independent 2-bit transparent latches and can be used as temporary storage for binary i

文件：218.19 Kbytes 页数：6 Pages

IKSEMICON