Dual D-type Flip-Flops (with Preset and Clear)

Description The flip-flop has independent data, preset, clear, and clock inputs and Q and Q outputs. The logic level present at the data input is transferred to the output during the positive going transition to the clock pulse. Preset and clear are independent of the clock and accomplished by a

文件：108.32 Kbytes 页数：8 Pages

RENESAS

瑞萨

Dual D-type Flip-Flops (with Preset and Clear)

文件：169.7 Kbytes 页数：10 Pages

RENESAS

瑞萨

Dual D Flip-Flop with Set and Reset High-Performance Silicon-Gate CMOS

Dual D Flip-Flop with Set and Reset High-Performance Silicon-Gate CMOS The IN74HC74A is identical in pinout to the LS/ALS74. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LS/ALSTTL outputs. This device consists of two D flip-flops wi

文件：100.28 Kbytes 页数：5 Pages

INTEGRAL

Integral Corp.

Dual D Flip-Flop with Set and Reset

The IN74HC74A is identical in pinout to the LS/ALS74. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LS/ALSTTL outputs. This device consists of two D flip-flops with individual Set, Reset, and Clock inputs. Information at a D-input is

文件：228.76 Kbytes 页数：6 Pages

IKSEMICON

Dual D Flip-Flop with Set and Reset High-Performance Silicon-Gate CMOS

Dual D Flip-Flop with Set and Reset High-Performance Silicon-Gate CMOS The IN74HC74A is identical in pinout to the LS/ALS74. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LS/ALSTTL outputs. This device consists of two D flip-flops wi

文件：100.28 Kbytes 页数：5 Pages

INTEGRAL

Integral Corp.