HD74HC677中文资料16-bit Address Comparator数据手册HITACHI规格书

描述 Description

The HD74HC677 address comparator simplifies addressing of memory boards and/or other peripheral devices. The four P inputs are normally hard wired with a preprogrammed address. An internal decoder determines what input infomation applied to the 16 A inputs must be low or high to cause a low state at the output (Y). For example, a positive-logic bit combination of 0111 (decimal 7) at the P input determines that inputs A1 through A7 must be low and that inputs A8 through A16 must be high to cause the output to go low. Equality of the address applied at the A inputs to the preprogrammed address is indicated by the output being low.
The HD74HC677 features an enable input (G). When G is low, the device is enabled. When G is high, the device is disabled and the output is high regardless of the A and P inputs.

特性 Features

•  High Speed Operation: tpd(A to Y) = 17 ns typ (CL= 50 pF)
•  High Output Current: Fanout of 10 LSTTL Loads
•  Wide Operating Voltage: VCC= 2 to 6V
•  Low Input Current: 1µA max
•  Low Quiescent Supply Current: ICC(static) = 4µA max (Ta = 25°C)