Octal Transparent Latches (with 3-state outputs)

Description When the latch enable (LE) input is high, the Q outputs of HD74HC563 will follow the inversion of the D inputs and the Q outputs of HD74HC573 will follow the D inputs. When the latch enable goes low, data at the D inputs will be retained at the outputs until latch enable returns hig

文件：138.73 Kbytes 页数：11 Pages

RENESAS

瑞萨

Octal Transparent Latches (with 3-state outputs)

文件：161.18 Kbytes 页数：13 Pages

RENESAS

瑞萨

Octal Transparent Latches (with 3-state outputs)

Description When the latch enable (LE) input is high, the Q outputs of HD74HC563 will follow the inversion of the D inputs and the Q outputs of HD74HC573 will follow the D inputs. When the latch enable goes low, data at the D inputs will be retained at the outputs until latch enable returns hig

文件：138.73 Kbytes 页数：11 Pages

RENESAS

瑞萨

Octal Transparent Latches (with 3-state outputs)

文件：161.18 Kbytes 页数：13 Pages

RENESAS

瑞萨

Octal 3-State Noninverting Transparent Latch

Octal 3-State Noninverting Transparent Latch High-Performance Silicon-Gate CMOS The IN74HC573A is identical in pinout to the LS/ALS573. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LS/ALSTTL outputs. These latches appear transparent

文件：117 Kbytes 页数：5 Pages

INTEGRAL

Integral Corp.