12-stage Binary Counter

Description The HD74HC4040 is a 12-stage counter. This device is incremented on the falling edge (negative transition) of the input clock, and all its output is reset to a low level by applying a logical high on its reset input. Features • High Speed Operation: tpd (Clock to Q1) = 15 ns

文件：93.71 Kbytes 页数：7 Pages

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12-stage Binary Counter

文件：113.96 Kbytes 页数：9 Pages

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12-stage Binary Counter

Description The HD74HC4040 is a 12-stage counter. This device is incremented on the falling edge (negative transition) of the input clock, and all its output is reset to a low level by applying a logical high on its reset input. Features • High Speed Operation: tpd (Clock to Q1) = 15 ns

文件：93.71 Kbytes 页数：7 Pages

RENESAS

瑞萨

12-stage Binary Counter

文件：113.96 Kbytes 页数：9 Pages

RENESAS

瑞萨

HC4020 14 STAGE BINARY COUNTER HC4040 12 STAGE BINARY COUNTER

DESCRIPTION The M54/74HC4020/HC4040 are high speed CMOS 14/12-STAGE BINARY COUNTER fabricated in silicon gate C2MOS technology. They have the same high speed performance of LSTTL combined with true CMOS low consumption. ■ HIGH SPEED fMAX = 73 MHz (TYP.) at VCC = 5 V ■ LOW POWER DISSIPATION ICC

文件：265.92 Kbytes 页数：13 Pages

STMICROELECTRONICS

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