Dual J-K Flip-Flops (with Preset and Clear)

文件：102.89 Kbytes 页数：7 Pages

RENESAS

瑞萨

Dual J-K Flip-Flop with Set and Reset High-Performance Silicon-Gate CMOS

Dual J-K Flip-Flop with Set and Reset High-Performance Silicon-Gate CMOS The IN74HC112A is identical in pinout to the LS/ALS112. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LS/ALSTTL outputs. Each flip-flop is negative-edg

文件：233.67 Kbytes 页数：6 Pages

IKSEMICON

Dual J-K Flip-Flop with Set and Reset High-Performance Silicon-Gate CMOS

Dual J-K Flip-Flop with Set and Reset High-Performance Silicon-Gate CMOS The IN74HC112A is identical in pinout to the LS/ALS112. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LS/ALSTTL outputs. Each flip-flop is negative-edg

文件：233.67 Kbytes 页数：6 Pages

IKSEMICON

Dual J-K Flip-Flop with Set and Reset High-Performance Silicon-Gate CMOS

Dual J-K Flip-Flop with Set and Reset High-Performance Silicon-Gate CMOS The IN74HC112A is identical in pinout to the LS/ALS112. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LS/ALSTTL outputs. Each flip-flop is negative-edg

文件：233.67 Kbytes 页数：6 Pages

IKSEMICON