2.5-V Phase-lock Loop Clock Driver

Description The HD74CDCV857A is a high-performance, low-skew, low-jitter, phase locked loop clock driver. It is specifically designed for use with DDR (Double Data Rate) synchronous DRAMs. Features • DDR333 / PC2700-Compliant, also meets DDR266 / PC2100 requirement. • Supports 60 MHz to 170 MH

文件：244.49 Kbytes 页数：13 Pages

RENESAS

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ASSP>Special Logic ICs for PC>HD74CDC Series(Special Logic for PC)

Renesas

瑞萨

2.5-V Phase-lock Loop Clock Driver

Description The HD74CDCV857 is a high-performance, low-skew, low-jitter, phase locked loop clock driver. It is specifically designed for use with DDR (Double Data Rate) synchronous DRAMs. Features • DDR266 / PC2100-Compliant • Supports 60 MHz to 170 MHz operation range • Distributes one diffe

文件：226.64 Kbytes 页数：13 Pages

RENESAS

瑞萨

2.5-V Phase-lock Loop Clock Driver

Description The HD74CDCV857 is a high-performance, low-skew, low-jitter, phase locked loop clock driver. It is specifically designed for use with DDR (Double Data Rate) synchronous DRAMs. Features • Supports 60 MHz to 200 MHz operation range • Distributes one differential clock input pair to t

文件：61.99 Kbytes 页数：15 Pages

HITACHIHitachi Semiconductor

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