18-bit Universal Bus Driver with 3-state Outputs

Description The HD74ALVC16835 is an 18-bit universal bus driver designed for 2.3 V to 3.6 V VCC operation. Data flow from A to Y is controlled by output enable (OE). The device operates in the transparent mode when the latch enable (LE) input is high. The A data is latched if the clock (CLK) inpu

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HITACHIHitachi Semiconductor

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18-bit Universal Bus Driver with 3-state Outputs

Description The HD74ALVC16835 is an 18-bit universal bus driver designed for 2.3 V to 3.6 V VCC operation. Data flow from A to Y is controlled by output enable (OE). The device operates in the transparent mode when the latch enable (LE) input is high. The A data is latched if the clock (CLK) inpu

文件：3.13811 Mbytes 页数：12 Pages

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18-bit Universal Bus Driver with 3-state Outputs

Description\nThe HD74ALVC16835 is an 18-bit universal bus driver designed for 2.3 V to 3.6 V VCC operation. Data flow from A to Y is controlled by output enable (OE). The device operates in the transparent mode when the latch enable (LE) input is high. The A data is latched if the clock (CLK) input • Meets “PC SDRAM registered DIMM design support document, Rev. 1.2”\n• VCC = 2.3 V to 3.6 V\n• Typical VOL ground bounce < 0.8 V (@VCC = 3.3 V, Ta = 25°C)\n• Typical VOL ground bounce < 0.8 V (@VCC = 3.3 V, Ta = 25°C)\n• High output current ±24 mA (@VCC = 3.0 V)\n• Ordering Information;

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18-bit Universal Bus Driver with 3-state Outputs

Description The HD74ALVC16835 is an 18-bit universal bus driver designed for 2.3 V to 3.6 V VCC operation. Data flow from A to Y is controlled by output enable (OE). The device operates in the transparent mode when the latch enable (LE) input is high. The A data is latched if the clock (CLK) inpu

文件：3.13811 Mbytes 页数：12 Pages

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