TTL HD74/HD74S Series

文件：143.51 Kbytes 页数：4 Pages

HITACHIHitachi Semiconductor

日立日立公司

SYNCHRONOUS DECADE RATE MULTIPLIERS

文件：296.01 Kbytes 页数：8 Pages

TI

德州仪器

SYNCHRONOUS DECADE RATE MULTIPLIERS

文件：296.01 Kbytes 页数：8 Pages

TI

德州仪器

SYNCHRONOUS DECADE RATE MULTIPLIER

DESCRIPTION 一 The 167 contains asynchronous decade counter and four decoding gates that serve to gate the clock through to the output at a sub- multiple of the clock frequency. The output pulse rate, relative to the clock frequency, is determined by signals applied to the Select (So 一 Ss) input

文件：297.73 Kbytes 页数：6 Pages

FAIRCHILD

仙童半导体

SYNCHRONOUS DECADE RATE MULTIPLIER

DESCRIPTION 一 The 167 contains asynchronous decade counter and four decoding gates that serve to gate the clock through to the output at a sub- multiple of the clock frequency. The output pulse rate, relative to the clock frequency, is determined by signals applied to the Select (So 一 Ss) input

文件：297.73 Kbytes 页数：6 Pages

FAIRCHILD

仙童半导体

SYNCHRONOUS DECADE RATE MULTIPLIER

DESCRIPTION 一 The 167 contains asynchronous decade counter and four decoding gates that serve to gate the clock through to the output at a sub- multiple of the clock frequency. The output pulse rate, relative to the clock frequency, is determined by signals applied to the Select (So 一 Ss) input

文件：297.73 Kbytes 页数：6 Pages

FAIRCHILD

仙童半导体