Rad-hard, high voltage, CMOS logic series

Features • ESCC qualified • 18 V Absolute maximum ratings • 3 V to 15 V operating voltage • Hermetic packages • Rad-hard 100 krad (Si) TID • SEL immune up to 119 MeV.cm²/mg • SEU immune up to 119 MeV.cm²/mg • -55 °C to +125 °C temperature range • ESCC specification available on ESCC websi

文件：336.95 Kbytes 页数：16 Pages

STMICROELECTRONICS

意法半导体

Dual D-type flip-flop

DESCRIPTION The HEF4013B is a dual D-type flip-flop which features independent set direct (SD), clear direct (CD), clock inputs (CP) and outputs (O, O). Data is accepted when CP is LOW and transferred to the output on the positive-going edge of the clock. The active HIGH asynchronous clear-direct

文件：79.33 Kbytes 页数：7 Pages

PHI

PHI

Dual D-type flip-flop

DESCRIPTION The HEF4013B is a dual D-type flip-flop which features independent set direct (SD), clear direct (CD), clock inputs (CP) and outputs (O, O). Data is accepted when CP is LOW and transferred to the output on the positive-going edge of the clock. The active HIGH asynchronous clear-direct

文件：79.33 Kbytes 页数：7 Pages

PHI

PHI

Dual D-type flip-flop

DESCRIPTION The HEF4013B is a dual D-type flip-flop which features independent set direct (SD), clear direct (CD), clock inputs (CP) and outputs (O, O). Data is accepted when CP is LOW and transferred to the output on the positive-going edge of the clock. The active HIGH asynchronous clear-direct

文件：79.33 Kbytes 页数：7 Pages

PHI

PHI