Octal 3-State Noninverting Transparent Latch(High-Performance Silicon-Gate CMOS)

The SL74HC573 is identical in pinout to the LS/ALS573. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LS/ALSTTL outputs. These latches appear transparent to data (i.e., the outputs change asynchronously) when Latch Enable is high. When

文件：53.94 Kbytes 页数：5 Pages

SLS

Octal 3-State Noninverting Transparent Latch(High-Performance Silicon-Gate CMOS)

SLS

OCTAL TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS

文件：741.38 Kbytes 页数：19 Pages

TI

德州仪器

丝印：HC573M；Package：SOIC；CDx4HC573 Octal Transparent D-Type Latches With 3-State Outputs

1 Features • 2-V to 6-V VCC operation • Wide operating temp range of –55℃ to 125℃ • 3-state outputs directly drive bus lines • Balanced propagation delays and transition times • Bus driver outputs drive up to 15 LS-TTL loads • Significant power reduction compared to LS-TTL Logic ICs 2 De

文件：1.18216 Mbytes 页数：21 Pages

TI

德州仪器

丝印：HC573M；Package：SOIC；CDx4HC573 Octal Transparent D-Type Latches With 3-State Outputs

1 Features • 2-V to 6-V VCC operation • Wide operating temp range of –55℃ to 125℃ • 3-state outputs directly drive bus lines • Balanced propagation delays and transition times • Bus driver outputs drive up to 15 LS-TTL loads • Significant power reduction compared to LS-TTL Logic ICs 2 De

文件：1.18216 Mbytes 页数：21 Pages

TI

德州仪器

丝印：HC573M；Package：SOIC；CDx4HC573 Octal Transparent D-Type Latches With 3-State Outputs

1 Features • 2-V to 6-V VCC operation • Wide operating temp range of –55℃ to 125℃ • 3-state outputs directly drive bus lines • Balanced propagation delays and transition times • Bus driver outputs drive up to 15 LS-TTL loads • Significant power reduction compared to LS-TTL Logic ICs 2 De

文件：1.18216 Mbytes 页数：21 Pages

TI

德州仪器

丝印：HC573M；Package：SOIC；CDx4HC573 Octal Transparent D-Type Latches With 3-State Outputs

1 Features • 2-V to 6-V VCC operation • Wide operating temp range of –55℃ to 125℃ • 3-state outputs directly drive bus lines • Balanced propagation delays and transition times • Bus driver outputs drive up to 15 LS-TTL loads • Significant power reduction compared to LS-TTL Logic ICs 2 De

文件：1.18216 Mbytes 页数：21 Pages

TI

德州仪器