H5TQ2G63BFR中文资料2Gb DDR3 SDRAM数据手册SK hynix规格书

描述 Description

The H5TQ2G43BFR-xxC, H5TQ2G83BFR-xxC and H5TQ2G63BFR-xxC are a 2,147,483,648-bit CMOS Double Data Rate III (DDR3) Synchronous DRAM, ideally suited for the main memory applications which requires large memory density and high bandwidth. SK Hynix 2Gb DDR3 SDRAMs offer fully synchronous operations referenced to both rising and falling edges of the clock. While all addresses and control inputs are latched on the rising edges of the CK (falling edges of the CK), Data, Data strobes and Write data masks inputs are sampled on both rising and falling edges of it. The data paths are internally pipelined and 8-bit prefetched to achieve very high bandwidth.

特性 Features

• VDD=VDDQ=1.5V +/- 0.075V
• Differential Data Strobe (DQS, /DQS)
• DM masks write data-in at the both rising and falling edges of the data strobe
• Programmable CAS latency 6, 7, 8, 9, 10 and (11) supported
• Programmable CAS Write latency (CWL) = 5, 6, 7, 8
• BL switch on the fly
• Average Refresh Cycle (Tcase of 0 °C~ 95 °C)
• Auto Self Refresh supported
• Driver strength selected by EMRS
• Asynchronous RESET pin supported
• TDQS (Termination Data Strobe) supported (x8 only)
• 8 bit pre-fetch
• This product in compliance with the RoHS directive.