GS841Z18AT-166I中文资料GSI数据手册PDF规格书

Functional Description

The GS841Z18/36AT is a 4Mbit Synchronous Static SRAM.

GSIs NBT SRAMs, like ZBT, NtRAM, NoBL or other pipelined read/double late write or flow through read/single late write SRAMs, allow utilization of all available bus bandwidth by eliminating the need to insert deselect cycles when the device is switched from read to write cycles.

特性 Features

• 256K x 18 and 128K x 36 configurations

• User-configurable Pipelined and Flow Through mode

• NBT (No Bus Turn Around) functionality allows zero wait

• Fully pin-compatible with both pipelined and flow through

NtRAM™, NoBL™ and ZBT™ SRAMs

• IEEE 1149.1 JTAG-compatible Boundary Scan

• 3.3 V +10/–5 core power supply

• 2.5 V or 3.3 V I/O supply

• LBO pin for Linear or Interleave Burst mode

• Byte write operation (9-bit Bytes)

• 3 chip enable signals for easy depth expansion

• Clock Control, registered, address, data, and control

• ZZ Pin for automatic power-down

• JEDEC-standard 100-lead TQFP package

• Pb-Free 100-lead TQFP package available