2M Synchronous Burst SRAM

[GSI] Functional Description Applications The GS820E32 is a 2,097,152 bit high performance synchronous SRAM with a 2 bit burst address counter. Although of a type originally developed for Level 2 Cache applications supporting high performance CPU’s, the device now finds application in synchrono

文件：345.07 Kbytes 页数：23 Pages

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64K x 32 2Mb Synchronous Burst SRAM

Features • FT pin for user-configurable flow through or pipelined operation • Single Cycle Deselect (SCD) operation • 3.3 V +10/–5 core power supply • 2.5 V or 3.3 V I/O supply • LBO pin for Linear or Interleaved Burst mode • Internal input resistors on mode pins allow floating m

文件：577.31 Kbytes 页数：22 Pages

GSI

64K x 32 2Mb Synchronous Burst SRAM

Features • FT pin for user-configurable flow through or pipelined operation • Single Cycle Deselect (SCD) operation • 3.3 V +10/–5 core power supply • 2.5 V or 3.3 V I/O supply • LBO pin for Linear or Interleaved Burst mode • Internal input resistors on mode pins allow floating m

文件：577.31 Kbytes 页数：22 Pages

GSI

64K x 32 2Mb Synchronous Burst SRAM

Features • FT pin for user-configurable flow through or pipelined operation • Single Cycle Deselect (SCD) operation • 3.3 V +10/–5 core power supply • 2.5 V or 3.3 V I/O supply • LBO pin for Linear or Interleaved Burst mode • Internal input resistors on mode pins allow floating m

文件：577.31 Kbytes 页数：22 Pages

GSI

64K x 32 2Mb Synchronous Burst SRAM

Features • FT pin for user-configurable flow through or pipelined operation • Single Cycle Deselect (SCD) operation • 3.3 V +10/–5 core power supply • 2.5 V or 3.3 V I/O supply • LBO pin for Linear or Interleaved Burst mode • Internal input resistors on mode pins allow floating m

文件：577.31 Kbytes 页数：22 Pages

GSI

64K x 32 2Mb Synchronous Burst SRAM

Features • FT pin for user-configurable flow through or pipelined operation • Single Cycle Deselect (SCD) operation • 3.3 V +10/–5 core power supply • 2.5 V or 3.3 V I/O supply • LBO pin for Linear or Interleaved Burst mode • Internal input resistors on mode pins allow floating m

文件：577.31 Kbytes 页数：22 Pages

GSI

64K x 32 2Mb Synchronous Burst SRAM

Features • FT pin for user-configurable flow through or pipelined operation • Single Cycle Deselect (SCD) operation • 3.3 V +10/–5 core power supply • 2.5 V or 3.3 V I/O supply • LBO pin for Linear or Interleaved Burst mode • Internal input resistors on mode pins allow floating m

文件：577.31 Kbytes 页数：22 Pages

GSI

64K x 32 2Mb Synchronous Burst SRAM

Features • FT pin for user-configurable flow through or pipelined operation • Single Cycle Deselect (SCD) operation • 3.3 V +10/–5 core power supply • 2.5 V or 3.3 V I/O supply • LBO pin for Linear or Interleaved Burst mode • Internal input resistors on mode pins allow floating m

文件：577.31 Kbytes 页数：22 Pages

GSI

64K x 32 2Mb Synchronous Burst SRAM

Features • FT pin for user-configurable flow through or pipelined operation • Single Cycle Deselect (SCD) operation • 3.3 V +10/–5 core power supply • 2.5 V or 3.3 V I/O supply • LBO pin for Linear or Interleaved Burst mode • Internal input resistors on mode pins allow floating m

文件：577.31 Kbytes 页数：22 Pages

GSI

64K x 32 2Mb Synchronous Burst SRAM

Features • FT pin for user-configurable flow through or pipelined operation • Single Cycle Deselect (SCD) operation • 3.3 V +10/–5 core power supply • 2.5 V or 3.3 V I/O supply • LBO pin for Linear or Interleaved Burst mode • Internal input resistors on mode pins allow floating m

文件：577.31 Kbytes 页数：22 Pages

GSI