18Mb 誇1x1Dp CMOS I/O Double Late Write SigmaRAM

SigmaRAM Family Overview GS8170DW36/72 SigmaRAMs are built in compliance with the SigmaRAM pinout standard for synchronous SRAMs. They are 18,874,368-bit (18Mb) SRAMs. This family of wide, very low voltage CMOS I/O SRAMs is designed to operate at the speeds needed to implement economical high per

文件：1.32686 Mbytes 页数：27 Pages

GSI

18Mb 誇1x1Dp CMOS I/O Double Late Write SigmaRAM

SigmaRAM Family Overview GS8170DW36/72 SigmaRAMs are built in compliance with the SigmaRAM pinout standard for synchronous SRAMs. They are 18,874,368-bit (18Mb) SRAMs. This family of wide, very low voltage CMOS I/O SRAMs is designed to operate at the speeds needed to implement economical high per

文件：1.32686 Mbytes 页数：27 Pages

GSI

18Mb 誇1x1Dp CMOS I/O Double Late Write SigmaRAM

SigmaRAM Family Overview GS8170DW36/72 SigmaRAMs are built in compliance with the SigmaRAM pinout standard for synchronous SRAMs. They are 18,874,368-bit (18Mb) SRAMs. This family of wide, very low voltage CMOS I/O SRAMs is designed to operate at the speeds needed to implement economical high per

文件：1.32686 Mbytes 页数：27 Pages

GSI

18Mb 誇1x1Dp CMOS I/O Double Late Write SigmaRAM

SigmaRAM Family Overview GS8170DW36/72 SigmaRAMs are built in compliance with the SigmaRAM pinout standard for synchronous SRAMs. They are 18,874,368-bit (18Mb) SRAMs. This family of wide, very low voltage CMOS I/O SRAMs is designed to operate at the speeds needed to implement economical high per

文件：1.32686 Mbytes 页数：27 Pages

GSI

18Mb 誇1x1Dp CMOS I/O Double Late Write SigmaRAM

SigmaRAM Family Overview GS8170DW36/72 SigmaRAMs are built in compliance with the SigmaRAM pinout standard for synchronous SRAMs. They are 18,874,368-bit (18Mb) SRAMs. This family of wide, very low voltage CMOS I/O SRAMs is designed to operate at the speeds needed to implement economical high per

文件：1.32686 Mbytes 页数：27 Pages

GSI

18Mb 誇1x1Dp CMOS I/O Double Late Write SigmaRAM

SigmaRAM Family Overview GS8170DW36/72 SigmaRAMs are built in compliance with the SigmaRAM pinout standard for synchronous SRAMs. They are 18,874,368-bit (18Mb) SRAMs. This family of wide, very low voltage CMOS I/O SRAMs is designed to operate at the speeds needed to implement economical high per

文件：1.32686 Mbytes 页数：27 Pages

GSI

18Mb 誇1x1Dp CMOS I/O Double Late Write SigmaRAM

SigmaRAM Family Overview GS8170DW36/72 SigmaRAMs are built in compliance with the SigmaRAM pinout standard for synchronous SRAMs. They are 18,874,368-bit (18Mb) SRAMs. This family of wide, very low voltage CMOS I/O SRAMs is designed to operate at the speeds needed to implement economical high per

文件：1.32686 Mbytes 页数：27 Pages

GSI

18Mb 誇1x1Dp CMOS I/O Double Late Write SigmaRAM

SigmaRAM Family Overview GS8170DW36/72 SigmaRAMs are built in compliance with the SigmaRAM pinout standard for synchronous SRAMs. They are 18,874,368-bit (18Mb) SRAMs. This family of wide, very low voltage CMOS I/O SRAMs is designed to operate at the speeds needed to implement economical high per

文件：1.32686 Mbytes 页数：27 Pages

GSI

18Mb 誇1x1Dp CMOS I/O Double Late Write SigmaRAM

SigmaRAM Family Overview GS8170DW36/72 SigmaRAMs are built in compliance with the SigmaRAM pinout standard for synchronous SRAMs. They are 18,874,368-bit (18Mb) SRAMs. This family of wide, very low voltage CMOS I/O SRAMs is designed to operate at the speeds needed to implement economical high per

文件：1.32686 Mbytes 页数：27 Pages

GSI

18Mb Σ1x1Dp CMOS I/O Double Late Write SigmaRAM

GSI