GS810C中文资料威世科技数据手册PDF规格书

Description

• The GS809C and 810C are system supervisor circuits designed to monitor VCC in digital systems and provide a reset signal to the host processor when necessary. No external components are required.

• When the processor power supply voltage drops below the reset threshold, the reset output is driven active, in less than 40µs (TD1). Reset is main tained active for a time period (TD2), after the Vcc rises above the threshold voltage.

• To prevent jitter, the reset threshold voltage has a built-in hysteresis of 0.4 of VTH.

• The GS809C has an active-low reset output, while the GS810C has an active-high reset output. Both devices have push/pull output drives.

• The reset signal is guaranteed valid, down to Vcc = 1.0V.

• Low supply current of 3µA makes these devices well suited for battery powered applications. They are designed to reject fast transients from causing false resets.

• Both devices are available in a space-saving SOT-23 package.

Features

• Tight reset voltage tolerances ± 1.5

• 4 reset active timeout period options

• Low quiescent current: < 3µA

• 9 reset threshold options from 2.1V to 4.63V

• Reset output guaranteed down to 1.0V

• No external components

• Vcc Transient immunity

• Wide temperature range –40°C to +85°C

Applications

• Computers

• Battery Powered Equipment

• Critical uProcessor and uController power supply monitoring