GP326823A中文资料Multimedia Processor数据手册Generalplus规格书

描述 Description

The Generalplus GP326823A, a highly integrated SoC (System-On a Chip), embedded 8Mx16 Bits SDRAM, offers a great cost-effective and high performance ratio solution for Multimedia and interactive game applications. It is embedded the ARM7TDMI with 8K-byte unified ID-cache and many tremendous features such as JPEG CODEC engine, MPEG4 decoder with de-blocking engine, MP3 decoder accelerator, binarization function for GPID application, TFT-LCD interface, CMOS sensor interface, scalar engine, TV encoder with de-flicker engine, 16-channel sound process unit (SPU), SDRAM controller, ROM/SRAM/NOR FLASH/ NAND FLASH with BCH/ECC Memory controller, UART/IrDA interface, 4-channel DMA controller, 6-channel 16-bit timers, RTC, Two set SD/ MMC card interface, MS/ MS pro card interface, xD card interface, USB 2.0 mini-host/device, mono STN-LCD, interrupt controller, Two set SPI (master/slave) controller, key scan controller, programmable I/O ports, stereo 16-bit DAC for audio playback, 2-channel DC-DC Boost control circuit, one data lane MIPI ,6-channel 12-bit ADC, MIC, PLL, and 38K-byte embedded SRAM.With a complete set of common system peripherals, the GP326823A chip minimizes overall system cost and no additional component needs to be added. Not only does GP326823A feature the high-speed performance, but it is also a cost-effective system and the most importantly - compatible with all ARM based programs.

特性 Features

• ARM7TDMI CPU with 8KB unified ID-cache, write buffer, embedded JTAG ICE, and working frequency up to 96MHz.
• 38KB SRAM for local data buffer.
• Sound Process Unit. (SPU)
• 16 hardware PCM/ADPCM channels.
• Built-in dynamic volume compressor.
• MP3/WMA decoder.

• JPEG CODEC
• ISO/IEC 10918-1 baseline JPEG.
• High-speed Decoding and Encoding with resolution up to 64MPixel.
• Hardware Motion JPEG Decoding and Encoding (up to VGA@30fps) for real-time video record and playback application.

• MPEG4 decoder
• H.263 baseline profile level30, MPEG4 simple profile level3 Decoder (up to 30 fps @ 640 x 480 resolution).
• Built-in de-blocking filter.

• OID Binary Function
• MIPI Function
• Up to 450M bit rate

• Video-in & CMOS sensor interface and CCIR601/CCIR656 standard supported.
• Embedded 8Mx16 Bits SDRAM
• Static memory controller. (NAND FLASH with ECC and 4/8/12/16/24/40/60 -bit BCH)
• Four-channel DMA controller.
• Mono and 16 gray levels STN-LCD controller.
• TFT-LCD controller.
• UPS051. (serial RGB)
• UPS052. (serial RGB dummy)
• Parallel RGB (6-6-6/8-8-8).
• I80 (8-bit/16-bit/18-bit system bus) I/F type.
• CCIR601/CCIR656.
• Scalar engine inside with programmable up-scaling and down-scaling factor.

• Image Processing Unit.
• Histogram statistics for auto brightness and contrast.
• Programmable RGB gamma correction.
• Color convert matrix for various post-image processing.

• 2-channel DC-DC Boost control circuit for LED Backlight and VGH/VGL voltage generator of TFT-LCD drivers.
• Interrupt Controller.
• Universal Serial Bus (USB) 2.0 high/full speed compliance device and USB mini-host with built-in transceiver.
• Watchdog timer.
• Six 16-bit timers/counters.
• Two sets of SD/SDHC/SDIO/MMC card interface.
• MS/MS pro card interface.
• xD card interface.
• Two sets of SPI (master/slave) interface with data rate up to 24Mbps.
• UART (asynchronous serial I/O) or IrDA interface with baud rate up to 1.8432Mbps and 115.2Kbps.
• 81 Programmable general I/O ports (GPIO) with pull-high/low control.
• 64/88 keys scan controller.
• Power manager.
• Built-in 3.3V to 1.2V Regulator.
• Low voltage reset.
• One data lane MIPI
• Real-time clock (RTC) with independent power supply.
• 96MHz, 27MHz and 12MHz PLL.
• 16-bit stereo DAC (2-channel) for audio playback.
• 12-bit ADC with 6 line-in channels.
• MIC with PGAC. (program gain control)
• TV encoder supporting NTSC/PAL and de-flicker and scalar function.