GL850A中文资料USB 2.0 Low-Power HUB Controller数据手册Genesys规格书

描述 Description

GL850A is Genesys Logic’s advanced version Hub solutions which fully comply with Universal Serial Bus Specification Revision 2.0.

GL850A embeds an 8-bit RISC processor to manipulate the control/status registers and respond to the requests from USB host. Firmware of GL850A will control its general purpose I/O (GPIO) to access the external EEPROM and then respond to the host the customized PID and VID configured in the external EEPROM.Default settings in the internal mask ROM is responded to the host without having external EEROM. GL850A is designed for customers with much flexibility. The more complicated settings such as PID, VID, and number of downstream ports settings are easily achieved by programming the external EEPROM (Ref. to Chapter 5).

Each downstream port of GL850A supports two-color (green/amber) status LEDs to indicate normal/abnormal status. GL850A also support both Individual and Gang modes (4 ports as a group) for power management.

The GL850A (64-pin) is a full function solution which supports both Individual/Gang power management modes and the two-color (green/amber) status LEDs. The low pin-count version GL850A (48-pin) only supports Gang mode. Please refer the table in the end of this chapter for more detail.

To fully meet the cost/performance requirement, GL850A is a single TT hub solution for the cost requirement.Genesys Logic also provides GL852 for multiple TT hub solution to target on systems which require higher performance for full/low-speed devices, like docking station, embedded system … etc.. Please refer to GL852 datasheet for more detailed information. \r

特性 Features

• Compliant to USB specification Revision 2.0
− 4 downstream ports
− Upstream port supports both high-speed (HS) and full-speed (FS) traffic
− Downstream ports support HS, FS, and low-speed (LS) traffic
− 1 control pipe (endpoint 0, 64-byte data payload) and 1 interrupt pipe (endpoint 1, 1-byte data payload)
− Backward compatible to USB specification Revision 1.1
• On-chip 8-bit micro-processor
− RISC-like architecture
− USB optimized instruction set
− Dual cycle instruction execution
− Performance: 6 MIPS @ 12MHz
− With 64-byte RAM and 2K internal ROM
− Support customized PID, VID by reading external EEPROM
− Support downstream port configuration by reading external EEPROM
• Single Transaction Translator (STT)
− Single TT shares the same TT control logics for all downstream port devices. This is the most cost
effective solution for TT. Multiple TT provides individual TT control logics for each downstream port.
This is a performance better choice for USB 2.0 hub. Please refer to GL852 datasheet for more
detailed information.
• Each downstream port supports two-color status indicator, with automatic and manual modes compliant to
USB specification Revision 2.0
• Support both individual and gang modes of power management and over-current detection for
downstream ports (64-pin LQFP)
• Support gang mode of power management and over-current detection for downstream ports
• Conform to bus power requirements
• Automatic switching between self-powered and bus-powered modes
• Integrate USB 2.0 transceiver
• PLL embedded with external 12 MHz crystal
• Operate on 3.3 Volts
• Embed serial resister for USB signals and integrate pull-up resister for upstream USB signal
• Improve output drivers with slew-rate control for EMI reduction
• Internal power-fail detection for ESD recovery
• 64/48-pin LQFP package
• Applications:
− Stand-alone USB hub
− PC motherboard USB hub, Docking of notebook
− Any compound device to support USB HUB function