GD25Q21BUIGR中文资料兆易创新数据手册PDF规格书

1. FEATURES

◆ 2M-bit Serial Flash

-256K-byte

-256 bytes per programmable page

◆ Standard, Dual, Quad SPI

-Standard SPI: SCLK, CS#, SI, SO, WP#, HOLD#

-Dual SPI:SCLK, CS#, IO0, IO1, WP#, HOLD#

-Quad SPI:SCLK, CS#, IO0, IO1, IO2, IO3

◆ High Speed Clock Frequency

-104MHz for fast read with 30PF load

-Dual I/O Data transfer up to 208Mbits/s

-Quad I/O Data transfer up to 416Mbits/s

◆ Software/Hardware Write Protection

-Write protect all/portion of memory via software

-Enable/Disable protection with WP# Pin

-Top or Bottom, Sector or Block selection

◆ Program/Erase Speed

-Page Program time:0.35ms typical

-Sector Erase time:50ms typical

-Block Erase time: 0.18/0.25s typical

-Chip Erase time:0.8s typical

◆ Flexible Architecture

-Sector of 4K-byte

-Block of 32/64K-byte

◆ Low Power Consumption

-12mA maximum active current

-5uA maximum power down current

◆ Single Power Supply Voltage

-Full voltage range:2.7~3.6V

◆ Minimum 100,000 Program/Erase Cycles

◆ Advanced security Features

-Power Supply Lock-Down

-3*512-Byte Security Registers With OTP Locks

- Volatile and Non-volatile Status Register Bits