Low Voltage, Zero Power E2CMOS PLD Generic Array Logic

文件：284.86 Kbytes 页数：18 Pages

Lattice

莱迪思

Low Voltage, Zero Power E2CMOS PLD Generic Array Logic

文件：284.86 Kbytes 页数：18 Pages

Lattice

莱迪思

Low Voltage, Zero Power E2CMOS PLD Generic Array Logic

文件：284.86 Kbytes 页数：18 Pages

Lattice

莱迪思

Low Voltage/ Zero Power E2CMOS PLD Generic Array Logic

Lattice

莱迪思

Low Voltage, Zero Power E2CMOS PLD Generic Array Logic™

Description\nThe GAL20LV8ZD, at 100 µA standby current and 15ns propagation delay provides the highest speed low-voltage PLD available in the market. The GAL20LV8ZD is manufactured using Lattice Semiconductor's advanced 3.3V E2CMOS process, which combines CMOS with Electrically Erasable (E2) floatin • 3.3V LOW VOLTAGE, ZERO POWER OPERATION\n• HIGH PERFORMANCE E2CMOS TECHNOLOGY\n• E2 CELL TECHNOLOGY\n• EIGHT OUTPUT LOGIC MACROCELLS\n• PRELOAD AND POWER-ON RESET OF ALL REGISTERS\n• APPLICATIONS INCLUDE:\n• ELECTRONIC SIGNATURE FOR IDENTIFICATION ;

Lattice

莱迪思