High Performance E2CMOS PLD Generic Array Logic

Description The GAL16V8, at 3.5 ns maximum propagation delay time, combines a high performance CMOS process with Electrically Erasable (E2) floating gate technology to provide the highest speed performance available in the PLD market. High speed erase times ( Features •HIGH PERFORMANCE

文件：316 Kbytes 页数：22 Pages

Lattice

莱迪思

Flash-Erasable Reprogrammable CMOS PAL Device

文件：300.29 Kbytes 页数：13 Pages

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

Flash-Erasable Reprogrammable CMOS PAL Device

文件：300.29 Kbytes 页数：13 Pages

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

Flash-Erasable Reprogrammable CMOS PAL Device

文件：300.29 Kbytes 页数：13 Pages

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司