FIN1532M集成电路（IC）的驱动器接收器收发器规格书PDF中文资料

General Description

This quad receiver is designed for high speed interconnects utilizing Low Voltage Differential Signaling (LVDS) technology. The receiver translates LVDS levels, with a typical differential input threshold of 100 mV, to LVTTL signal levels. LVDS provides low EMI at ultra low power dissipation even at high frequencies. This device is ideal for high speed transfer of clock and data.

The FIN1532 can be paired with its companion driver, the FIN1531, or any other LVDS driver.

特性 Features

■ Greater than 400Mbs data rate

■ 5V power supply operation

■ 0.5 ns maximum differential pulse skew

■ 3 ns maximum propagation delay

■ Low power dissipation

■ Power-Off protection for inputs and outputs

■ Fail safe protection for open-circuit, shorted and

terminated receiver inputs

■ Meets or exceeds the TIA/EIA-644 LVDS standard

■ Pin compatible with equivalent RS-422

and PECL devices

■ 16-Lead SOIC and TSSOP packages save space