3.3V LVDS 2-Bit High Speed Differential Receiver

General Description This dual receiver is designed for high speed interconnects utilizing Low Voltage Differential Signaling (LVDS) technology. The receiver translates LVDS levels, with a typical differential input threshold of 100 mV, to LVTTL signal levels. LVDS provides low EMI at ultra low po

文件：1.027569 Mbytes 页数：9 Pages

FairchildFairchild Semiconductor

仙童半导体飞兆/仙童半导体公司

3.3V LVDS 2-Bit High Speed Differential Receiver

文件：1.04051 Mbytes 页数：10 Pages

FairchildFairchild Semiconductor

仙童半导体飞兆/仙童半导体公司

3.3V LVDS 2-Bit High-Speed Differential Receiver

文件：750.14 Kbytes 页数：12 Pages

ONSEMI

安森美半导体

P-Channel Silicon MOSFET General-Purpose Switching Device

Features • Low ON-resistance. • 2.5V drive. • Mounting height 1.1mm. • Composite type, facilitating high-density mounting.

文件：42.62 Kbytes 页数：4 Pages

SANYO

三洋

ELECTRICAL & MECHANICAL SPECIFICATION

FEATURES Gray coded, standard and complimentary versions PCB Terminals + extra stabilising terminals Standard 22.5° indexing 4-Bit Standard 45° indexing 3-Bit Adjustable stops to restrict number of positions Standard silver contacts, gold flashed Moulded 27.5mm diameter Spindl

文件：707.54 Kbytes 页数：2 Pages

LORLIN