3.3V BTL 8-bit latched/registered/pass-thru universal transceiver

DESCRIPTION The FBL2033 is an 8-bit transceiver featuring a split input (AI) and output (AO) bus on the TTL-level side. FEATURES • 8-bit transceivers • Latched, registered or straight through in either A to B or B to A path • Drives heavily loaded backplanes with equivalent load impedances do

文件：150.36 Kbytes 页数：14 Pages

PHI

PHI

3.3V BTL 8-bit latched/registered/pass-thru universal transceiver

恩XP

3.3V BTL 8-bit latched/registered/pass-thru Futurebus universal interface transceiver

DESCRIPTION The FBL22033 is an 8-bit transceiver featuring a split input (AI) and output (AO) bus on the TTL-level side. FEATURES • 8-bit transceivers • Latched, registered or straight through in either A to B or B to A path • Drives heavily loaded backplanes with equivalent load impedances d

文件：147.24 Kbytes 页数：14 Pages

PHI

PHI

3.3V BTL 8-bit latched/registered/pass-thru universal transceiver

DESCRIPTION The FBL2033 is an 8-bit transceiver featuring a split input (AI) and output (AO) bus on the TTL-level side. FEATURES • 8-bit transceivers • Latched, registered or straight through in either A to B or B to A path • Drives heavily loaded backplanes with equivalent load impedances do

文件：150.36 Kbytes 页数：14 Pages

PHI

PHI

3.3V BTL 8-bit latched/registered/pass-thru Futurebus universal interface transceiver

恩XP