F81768中文资料Power Saving (EUP) SIO & Controlloer数据手册FINTEK规格书

描述 Description

The F81768 which is the featured IO chip for PC system is equipped with ATX/AT Strapping pin, which implements the Low Pin Count (LPC) interface, includes I/O functionally as well as motherboard glue logic into a 128-pin package.(1)The F81768 includes one IEEE 1284 Parallel Port, two UART Ports (COM Ports) with up to 128 bytes FIFO, provide 9 bit (multidrop) function, one 80 port (multi with COM2), Hardware Keyboard Controller (KBC), and SIR. The UART supports legacy speeds up to 115.2K bps as well as even higher baud rates of 230K, 460K, or 921K bps to support higher speed modems.The F81768 integrates with hardware monitor, 11 sets of voltage sensor, 3 sets of creative auto-controlling fans and 3 temperature sensor pins for the accurate dual current type temperature measurement for CPU thermal diode or external transistors 2N3906. Others, the F81768 supports newest AMD TSI, Intel PECI 3.0 interfaces, MXM and SMBus (master & slave) for temperature sensing and provides the power sequence controller function for AMD platform.(1)The F81768 provides flexible features for multi-directional application. For instance, the F81768 provides 61 GPIO pins (multi-pin), IRQ sharing function also designed in UART feature for particular usage and accurate current mode H/W monitor will be worth in measurement of temperature, provides 3 modes fan speed control mechanism included Manual Mode/Stage Auto Mode/Linear Auto Mode for users’ selection.(1)In order to save the current consumption when the system is in the soft off state which is so called power saving function. The power saving function supports that system boot-on not only by pressing the power button but also by the wake-up events via GPIO3x, GPIO5x & RI#. When the system enters the S4/S5 state, F81768 can cut off the VSB power rail which supplies power source to the devices like the LAN chip, the chipset, the SIO, the audio codec, DRAM, and etc. The PC system can be simulated to G3-like state when system enters the S4/S5 states. At the G3-like state, the F81768 consumes the 5VA power rail only. The integrated two control pins are utilized to turn on or off VSB power rail in the G3-like status. The turned on VSB rail is supplied to a wake up device to fulfill a low power consumption system which supports a wake up function.(1)These features as above description will help you more and improve the product value.The F81768 is powered by 3.3V voltage, with the LPC interface in the green package of 128-LQFP (14mm*14mm).(1)(1)

特性 Features

General Functions n                        -   Comply with LPC Spec. 1.1
n                        -   Support DPM (Device Power Management), ACPI
n                        -   Support AMD power sequence controller
n                        -   Provides two UARTs with programmable 16/32/64/128 bytes FIFO
n                        -   Hardware KBC and Parallel Port
n                        -   H/W monitor functions
n                        -   Support AMD TSI, MXM, Intel PECI 3.0 interface
n                        -   Provide SMBus slave & master function
n                        -   Provide 3 sets of SMBus Interface.
n                        -   61 GPIO Pins for flexible application
n                        -   Provide Power Saving Function (Comply ERP lot 6.0)
n                        -   Support Intel Deep Sleep Well (DSW) Timing Sequence
n                        -   Provide ATX emulates AT Function
n                        -   24/48 MHz clock input
n                        -   Packaged in 128-LQFP and powered by 3.3VCC
 
Intel Platformn                        -   Support Intel® Deep Sleep Well (DSW)
n                        -   Support Intel® PECI 3.0
 
AMD Platformn                        -   Support AMD® Power Sequence (Group A and Group B)
 
UARTn                        -   Two high-speed 16C550/16C650/16C750/16C850/16C950 compatible UART with programmable 16/32/64/128 bytes FIFO
n                        -   Baud rate up to 115.2K, max. up to 1.5M
n                        -   Support IRQ sharing
n                        -   Support Ring-In Wakeup
n                        -   Provide auto flow control function
n                        -   Provide Multi drop (9-bits) Function for Gaming Machine
n                        -   Support programmable register for TX/RX only, Modem control, & fully UART function
 
Infraredn                        -   Support IrDA version 1.0 SIR protocol with maximum baud rate up to 115.2K bps
 
80-Port Interface n                        -   Monitor 0x80 Port and output the value via signals defined for 7-segment display.
n                        -   High nibble and low nibble are outputted interleaved at 1KHz frequency.
n                        -   80-Port output via COM2 interface.
n                        -   Provide MXM/PECI/TSI/T1/T2/T3 value via 80-port
 
Parallel Portn                        -   One PS/2 compatible bi-directional parallel port
n                        -   Support Enhanced Parallel Port (EPP) Compatible with IEEE 1284 specification
n                        -   Support Extended Capabilities Port (ECP) Compatible with IEEE 1284 specification
n                        -   Enhanced printer port back-drive current protection
 
Hardware Monitor Functions n                        -   3 dual current type (±3℃) thermal inputs for CPU thermal diode and 2N3906 transistors
n                        -   Temperature range -40℃~127℃
n                        -   11 sets voltage monitoring (6 external and 5 internal powers)
n                        -   Voltage monitor supports Over Voltage Protection (OVP)
n                        -   High limit signal (PME#) for Vcore level
n                        -   3 fan speed monitoring inputs
n                        -   3 fan speed PWM/DC control outputs(support 3 wire and 4 wire fans)
n                        -   The Fan PWM output frequency can be programmed as 23.5/11.75/5.875KHz, & 200Hz for LCD backlight adjustment
n                        -   Stage auto mode ( 2-Limit and 3-Stage)/Linear auto mode/Manual mode
n                        -   OVT# hardware signals output
n                        -   Case open detection (assert via PME/BEEP)
n                        -   WATCHDOG comparison of all monitored values
                 -   PSIN# detection time flag is programmable 1s(default)/2s/3s/4s (Enter BIOS setting page under the quick booting                           WIN8/WIN8.1 OS)
 
Keyboard Controllern                         -   LPC interface support serial interrupt channel 1, 12.
n                         -   Two 16bit Programmable Address fully decoder, default 0x60 and 0x64.
n                         -   Support two PS/2 interface, one for PS/2 mouse and the other for keyboard.
n                         -   Programmable compatibility with the 8042.
n                         -   Support both interrupt and polling modes.
n                         -   Fast Gate A20 and Hardware Keyboard Reset.
 
ACPIn                         -   Provide ATX Emulates AT Function
 
Power Saving Controller n                         -   ACPI Timing and Power Control
n                         -   Wake-up Supported
n                         -   G3-like Timing Control
n                         -   Comply With ERP Lot 6.0
n                         -   Built in Soft Start Function for Two Control Pins with VSB Power Sources Control.
n                         -   Event in input via EVENT_IN, GPIO0x (except GPIO07), GPIO1x , GPIO3x, GPIO44~47, GPIO 5x, RI# pins
 
GPIO Functionn                         -   Total 61 pins GPIO
n                         -   GPIO0x , GPIO1x , GPIO3x, GPIO4x, GPIO5x, GPIO6x support SMI wake up via PME# or SIRQ
n                         -   GPIO0x, GPIO3x, GPIO5x could be reset by 3VA/VBAT via the register setting
n                         -   Scan Code
n                         -   All GPIO supports digit IO for Input/Output control, Output data control, input status.
n                         -   Support High/Low Level/Pulse, Open Drain/Push Pull function selection
 
Watch Dog Timern                         -   Time resolution minute/second
n                         -   Maximum 256 minutes or 256 seconds
n                         -   Output signal via WDTRST#/PWROK/PCI_RST4#
n                         -   WDT could also wake up via PME#, PSOUT#
n                         -   Provide hardware strapping pin & auto reload function
 
AMD TSI/MXM/I2C Interfacen                         -   Support slave interface to report the hardware monitor data under S0/S3/S5
n                         -   I2C slave default address is 5Ch
n                         -   Support master interface to get the thermal data via PCH & MXM module
n                         -   Provide 3 sets of SMBus for TSI/MXM/I2C interface.
n                         -   AMD TSI/MXM/I2C interfaces could be selected individually via 4 sets of pins
 
Package                   -   128-pin LQFP (14mm*14mm) Green Package 
128-LQFP Green Package