EPM7512AE中文资料PDF规格书
EPM7512AE规格书详情
General Description
MAX 7000A (including MAX 7000AE) devices are high-density, high-performance devices based on Altera’s second-generation MAX architecture.
Features...
■ High-performance 3.3-V EEPROM-based programmable logic
devices (PLDs) built on second-generation Multiple Array MatriX
(MAX®) architecture (see Table 1)
■ 3.3-V in-system programmability (ISP) through the built-in
IEEE Std. 1149.1 Joint Test Action Group (JTAG) interface with
advanced pin-locking capability
– MAX 7000AE device in-system programmability (ISP) circuitry
compliant with IEEE Std. 1532
– EPM7128A and EPM7256A device ISP circuitry compatible with
IEEE Std. 1532
■ Built-in boundary-scan test (BST) circuitry compliant with
IEEE Std. 1149.1
■ Supports JEDEC Jam Standard Test and Programming Language
(STAPL) JESD-71
■ Enhanced ISP features
– Enhanced ISP algorithm for faster programming (excluding
EPM7128A and EPM7256A devices)
– ISP_Done bit to ensure complete programming (excluding
EPM7128A and EPM7256A devices)
– Pull-up resistor on I/O pins during in-system programming
■ Pin-compatible with the popular 5.0-V MAX 7000S devices
■ High-density PLDs ranging from 600 to 10,000 usable gates
■ Extended temperature range
■ 4.5-ns pin-to-pin logic delays with counter frequencies of up to
227.3 MHz
■ MultiVoltTM I/O interface enables device core to run at 3.3 V, while
I/O pins are compatible with 5.0-V, 3.3-V, and 2.5-V logic levels
■ Pin counts ranging from 44 to 256 in a variety of thin quad flat pack
(TQFP), plastic quad flat pack (PQFP), ball-grid array (BGA), space
saving FineLine BGATM, and plastic J-lead chip carrier (PLCC)
packages
■ Supports hot-socketing in MAX 7000AE devices
■ Programmable interconnect array (PIA) continuous routing structure
for fast, predictable performance
■ PCI-compatible
■ Bus-friendly architecture, including programmable slew-rate control
■ Open-drain output option
■ Programmable macrocell registers with individual clear, preset,
clock, and clock enable controls
■ Programmable power-up states for macrocell registers in
MAX 7000AE devices
■ Programmable power-saving mode for 50 or greater power
reduction in each macrocell
■ Configurable expander product-term distribution, allowing up to
32 product terms per macrocell
■ Programmable security bit for protection of proprietary designs
■ 6 to 10 pin- or logic-driven output enable signals
■ Two global clock signals with optional inversion
■ Enhanced interconnect resources for improved routability
■ Fast input setup times provided by a dedicated path from I/O pin to
macrocell registers
■ Programmable output slew-rate control
■ Programmable ground pins
产品属性
- 产品编号:
EPM7512AEFC256-12
- 制造商:
Intel
- 类别:
集成电路(IC) > CPLD(复杂可编程逻辑器件)
- 系列:
MAX® 7000A
- 包装:
托盘
- 可编程类型:
系统内可编程
- 供电电压 - 内部:
3V ~ 3.6V
- 工作温度:
0°C ~ 70°C(TA)
- 安装类型:
表面贴装型
- 封装/外壳:
256-BGA
- 供应商器件封装:
256-FBGA(17x17)
- 描述:
IC CPLD 512MC 12NS 256FBGA
供应商 | 型号 | 品牌 | 批号 | 封装 | 库存 | 备注 | 价格 |
---|---|---|---|---|---|---|---|
ALTERA/阿尔特拉 |
0819+ |
TQFP-144 |
149 |
一级代理,专注军工、汽车、医疗、工业、新能源、电力 |
询价 | ||
ALTERA |
2016+ |
PQFP |
3000 |
公司只做原装,假一赔十,可开17%增值税发票! |
询价 | ||
INTEL |
22+ |
SMD |
518000 |
明嘉莱只做原装正品现货 |
询价 | ||
Intel/Altera |
23+ |
BGA256 |
6000 |
诚信服务,绝对原装原盘 |
询价 | ||
ALTERA |
23+ |
TQFP144 |
3000 |
全新原装、诚信经营、公司现货销售 |
询价 | ||
Altera |
21+ |
144TQFP |
13880 |
公司只售原装,支持实单 |
询价 | ||
ALTERA/阿尔特拉 |
21+ |
25000 |
原厂原包 深圳现货 主打品牌 假一赔百 可开票! |
询价 | |||
ALTERA |
1301+ |
QFP144 |
12 |
1301+ |
询价 | ||
ALTERA/阿尔特拉 |
23+ |
208-PinPQFP |
25000 |
原装正品公司现货,假一赔十! |
询价 | ||
ALTERA/阿尔特拉 |
BGA |
BGA |
644 |
XILINX-ALTERA专卖!合作共赢! |
询价 |