EPM7256A中文资料PDF规格书
EPM7256A规格书详情
General Description
MAX 7000A (including MAX 7000AE) devices are high-density, high-performance devices based on Altera’s second-generation MAX architecture.
Features...
■ High-performance 3.3-V EEPROM-based programmable logic
devices (PLDs) built on second-generation Multiple Array MatriX
(MAX®) architecture (see Table 1)
■ 3.3-V in-system programmability (ISP) through the built-in
IEEE Std. 1149.1 Joint Test Action Group (JTAG) interface with
advanced pin-locking capability
– MAX 7000AE device in-system programmability (ISP) circuitry
compliant with IEEE Std. 1532
– EPM7128A and EPM7256A device ISP circuitry compatible with
IEEE Std. 1532
■ Built-in boundary-scan test (BST) circuitry compliant with
IEEE Std. 1149.1
■ Supports JEDEC Jam Standard Test and Programming Language
(STAPL) JESD-71
■ Enhanced ISP features
– Enhanced ISP algorithm for faster programming (excluding
EPM7128A and EPM7256A devices)
– ISP_Done bit to ensure complete programming (excluding
EPM7128A and EPM7256A devices)
– Pull-up resistor on I/O pins during in-system programming
■ Pin-compatible with the popular 5.0-V MAX 7000S devices
■ High-density PLDs ranging from 600 to 10,000 usable gates
■ Extended temperature range
■ 4.5-ns pin-to-pin logic delays with counter frequencies of up to
227.3 MHz
■ MultiVoltTM I/O interface enables device core to run at 3.3 V, while
I/O pins are compatible with 5.0-V, 3.3-V, and 2.5-V logic levels
■ Pin counts ranging from 44 to 256 in a variety of thin quad flat pack
(TQFP), plastic quad flat pack (PQFP), ball-grid array (BGA), space
saving FineLine BGATM, and plastic J-lead chip carrier (PLCC)
packages
■ Supports hot-socketing in MAX 7000AE devices
■ Programmable interconnect array (PIA) continuous routing structure
for fast, predictable performance
■ PCI-compatible
■ Bus-friendly architecture, including programmable slew-rate control
■ Open-drain output option
■ Programmable macrocell registers with individual clear, preset,
clock, and clock enable controls
■ Programmable power-up states for macrocell registers in
MAX 7000AE devices
■ Programmable power-saving mode for 50 or greater power
reduction in each macrocell
■ Configurable expander product-term distribution, allowing up to
32 product terms per macrocell
■ Programmable security bit for protection of proprietary designs
■ 6 to 10 pin- or logic-driven output enable signals
■ Two global clock signals with optional inversion
■ Enhanced interconnect resources for improved routability
■ Fast input setup times provided by a dedicated path from I/O pin to
macrocell registers
■ Programmable output slew-rate control
■ Programmable ground pins
产品属性
- 产品编号:
EPM7256AEFC100-10N
- 制造商:
Intel
- 类别:
集成电路(IC) > CPLD(复杂可编程逻辑器件)
- 系列:
MAX® 7000A
- 包装:
托盘
- 可编程类型:
系统内可编程
- 供电电压 - 内部:
3V ~ 3.6V
- 工作温度:
0°C ~ 70°C(TA)
- 安装类型:
表面贴装型
- 封装/外壳:
100-LBGA
- 供应商器件封装:
100-FBGA(11x11)
- 描述:
IC CPLD 256MC 10NS 100FBGA
供应商 | 型号 | 品牌 | 批号 | 封装 | 库存 | 备注 | 价格 |
---|---|---|---|---|---|---|---|
ALTERA |
21+ |
BGA-256D |
3800 |
询价 | |||
ALTERA/阿尔特拉 |
23+ |
NA/ |
3382 |
原装现货,当天可交货,原型号开票 |
询价 | ||
Intel/Altera |
23+ |
TQFP144(20x20) |
7350 |
现货供应,当天可交货!免费送样,原厂技术支持!!! |
询价 | ||
ALTERA |
23+ |
QFP208 |
20000 |
全新原装假一赔十 |
询价 | ||
ALTERA/阿尔特拉 |
2020+ |
NA |
80000 |
只做自己库存,全新原装进口正品假一赔百,可开13%增 |
询价 | ||
ALTERA |
三年内 |
1983 |
纳立只做原装正品13590203865 |
询价 | |||
ALTERA/阿尔特拉 |
22+ |
TQFP |
100000 |
代理渠道/只做原装/可含税 |
询价 | ||
ALTERA/阿尔特拉 |
24+ |
NA |
58000 |
全新原厂原装正品现货,可提供技术支持、样品免费! |
询价 | ||
ALTERA/阿尔特拉 |
21+ |
TQFP-144 |
12800 |
公司只有原装 |
询价 | ||
ALTERA/阿尔特拉 |
23+ |
TQFP-144 |
30000 |
原装正品公司现货,假一赔十! |
询价 |
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