EPM1270T144C3N集成电路（IC）的CPLD（复杂可编程逻辑器件）规格书PDF中文资料

厂商型号	EPM1270T144C3N
参数属性	EPM1270T144C3N 封装/外壳为144-LQFP；包装为托盘；类别为集成电路（IC）的CPLD（复杂可编程逻辑器件）；产品描述：IC CPLD 980MC 6.2NS 144TQFP
功能描述	Section I. MAX II Device Family Data Sheet
封装外壳	144-LQFP
文件大小	988.19 Kbytes
页面数量	88 页
生产厂商	Altera
中文名称	阿尔特
网址	网址
数据手册	下载地址一下载地址二到原厂下载
更新时间	2025-11-18 23:00:00
人工找货	EPM1270T144C3N价格和库存，欢迎联系客服免费人工找货

特性 Features

The MAX II CPLD has the following features:

■ Low-cost, low-power CPLD

■ Instant-on, non-volatile architecture

■ Standby current as low as 25 µA

■ Provides fast propagation delay and clock-to-output times

■ Provides four global clocks with two clocks available per logic array block (LAB)

■ UFM block up to 8 Kbits for non-volatile storage

■ MultiVolt core enabling external supply voltages to the device of either

3.3 V/2.5 V or 1.8 V

■ MultiVolt I/O interface supporting 3.3-V, 2.5-V, 1.8-V, and 1.5-V logic levels

■ Bus-friendly architecture including programmable slew rate, drive strength,

bus-hold, and programmable pull-up resistors

■ Schmitt triggers enabling noise tolerant inputs (programmable per pin)

■ I/Os are fully compliant with the Peripheral Component Interconnect Special

Interest Group (PCI SIG) PCI Local Bus Specification, Revision 2.2 for 3.3-V

operation at 66 MHz

■ Supports hot-socketing

■ Built-in Joint Test Action Group (JTAG) boundary-scan test (BST) circuitry

compliant with IEEE Std. 1149.1-1990

■ ISP circuitry compliant with IEEE Std. 1532