14 Pin DIP 5 Tap Low-Profile TTL Compatible Active Delay Lines

14 Pin DIP 5 Tap Low-Profile TTL Compatible Active Delay Lines Whichever is greater. Delay times referenced from input to leading edges at 25°C, 5.0V, with no load

文件：43.7 Kbytes 页数：1 Pages

PCA

14 Pin DIP 5 Tap Low-Profile TTL Compatible Active Delay Lines

文件：43.7 Kbytes 页数：1 Pages

PCA

RF AMPLIFIER MODEL

文件：77.49 Kbytes 页数：1 Pages

APITECH

One-to-Four LVCMOS-to-LVPECL Output Clock and Data Driver

文件：272.45 Kbytes 页数：11 Pages

Maxim

美信

One-to-Four LVCMOS-to-LVPECL Output Clock and Data Driver

文件：272.45 Kbytes 页数：11 Pages

Maxim

美信