14 Pin DIP 5 Tap Low-Profile TTL Compatible Active Delay Lines

14 Pin DIP 5 Tap Low-Profile TTL Compatible Active Delay Lines Whichever is greater. Delay times referenced from input to leading edges at 25°C, 5.0V, with no load

文件：43.7 Kbytes 页数：1 Pages

PCA

14 Pin DIP 5 Tap Low-Profile TTL Compatible Active Delay Lines

文件：43.7 Kbytes 页数：1 Pages

PCA

HERMETICALLY SEALED RELAY

文件：57.83 Kbytes 页数：4 Pages

HONGFA

宏发电声

Dual 1:5 Differential LVPECL/LVECL/HSTL Clock and Data Drivers

General Description The MAX9312/MAX9314 are low skew, dual 1-to-5 differential drivers designed for clock and data distribution. These devices accept two inputs. Each input is reproduced at five differential outputs. The differential inputs can be adapted to accept single-ended inputs by connecti

文件：112.75 Kbytes 页数：9 Pages

Maxim

美信

Dual 1:5 Differential LVPECL/LVECL/HSTL Clock and Data Drivers

General Description The MAX9312/MAX9314 are low skew, dual 1-to-5 differential drivers designed for clock and data distribution. These devices accept two inputs. Each input is reproduced at five differential outputs. The differential inputs can be adapted to accept single-ended inputs by connecti

文件：112.75 Kbytes 页数：9 Pages

Maxim

美信