Cyclone III Device Handbook

文件：7.30828 Mbytes 页数：274 Pages

Altera

阿尔特

Cyclone III Device Handbook

文件：7.30828 Mbytes 页数：274 Pages

Altera

阿尔特

Cyclone III Device Handbook

文件：7.30828 Mbytes 页数：274 Pages

Altera

阿尔特

Cyclone III Device Handbook

文件：7.30828 Mbytes 页数：274 Pages

Altera

阿尔特

Cyclone III Device Handbook

文件：7.30828 Mbytes 页数：274 Pages

Altera

阿尔特

Cyclone III Device Handbook

文件：7.30828 Mbytes 页数：274 Pages

Altera

阿尔特

Cyclone III Device Handbook

文件：7.30828 Mbytes 页数：274 Pages

Altera

阿尔特

Cyclone III Device Handbook

文件：7.30828 Mbytes 页数：274 Pages

Altera

阿尔特

EP3C5E144C8N - 芯片, FPGA, CYCLONE III, 5K单元, 144EQFP

The EP3C5E144C8N is a Cyclone® III FPGA consists of 5136 vertically arranged logic elements (LEs), 414kb of embedded memory and 23 18x18 embedded multipliers. The architecture includes highly efficient interconnect and low-skew clock networks, providing connectivity between logic structures for cloc ·2 Phase-locked loops\n·70 Differential channels\n·Hot-socketing operation support\n·Routing architecture optimized for design separation flow with the Quartus® II software\n·Ability to disable external JTAG port\n·Error detection (ED) cycle indicator to core\n·Internal oscillator enables system mon;

Intel

英特尔

EP3C5M164C8N - 芯片, FPGA, CYCLONE III, 5K单元, 164MQFP

The EP3C5M164C8N is a Cyclone® III FPGA consists of 5136 vertically arranged logic elements (LEs), 414kb of embedded memory and 23 18x18 embedded multipliers. The architecture includes highly efficient interconnect and low-skew clock networks, providing connectivity between logic structures for cloc ·2 Phase-locked loops\n·70 Differential channels\n·Hot-socketing operation support\n·Routing architecture optimized for design separation flow with the Quartus® II software\n·Ability to disable external JTAG port\n·Error detection (ED) cycle indicator to core\n·Internal oscillator enables system mon;

Intel

英特尔